Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series0/EZR32WG/EZR32WG330F64R69/VCMP/IEN#0x0
Interrupt Enable Register
Edge Trigger Interrupt Enable
Warm-up Interrupt Enable
https://github.com/cmsis-svd/cmsis-svd-data